公开(公告)号：US20130193843A1

公开(公告)日：2013-08-01

申请号：US13753449

申请日：2013-01-29

Applicant: Industrial Technology Research Institute

Inventor： Jing-Yi Yan ,  Chih-Chieh Hsu ,  Chen-Wei Lin ,  Shu-Tang Yeh ,  Ping-I Shih

IPC: H05B33/22

CPC classification number: H05B33/22 ,  H01L27/3211 ,  H01L27/322 ,  H01L27/3267 ,  H01L51/5218 ,  H01L51/5234

Abstract: A double-side light emitting display panel includes a substrate, a plurality of top emission pixel structures and a plurality of bottom emission pixel structures. The top emission pixel structures are disposed on the substrate, and the bottom emission pixel structures are disposed on the substrate. The top emission pixel structures and the bottom emission pixel structures are arranged alternatively on the substrate.

Abstract translation: 双面发光显示面板包括基板，多个顶部发射像素结构和多个底部发射像素结构。 顶部发射像素结构设置在衬底上，并且底部发射像素结构设置在衬底上。 顶部发射像素结构和底部发射像素结构交替地布置在衬底上。

公开(公告)号：US09041280B2

公开(公告)日：2015-05-26

申请号：US13753449

申请日：2013-01-29

Applicant: Industrial Technology Research Institute

Inventor： Jing-Yi Yan ,  Chih-Chieh Hsu ,  Chen-Wei Lin ,  Shu-Tang Yeh ,  Ping-I Shih

IPC: H01J1/62 ,  H01J63/04 ,  H05B33/22 ,  H01L51/52 ,  H01L27/32

CPC classification number: H05B33/22 ,  H01L27/3211 ,  H01L27/322 ,  H01L27/3267 ,  H01L51/5218 ,  H01L51/5234

Abstract: A double-side light emitting display panel includes a substrate, a plurality of top emission pixel structures and a plurality of bottom emission pixel structures. The top emission pixel structures are disposed on the substrate, and the bottom emission pixel structures are disposed on the substrate. The top emission pixel structures and the bottom emission pixel structures are arranged alternatively on the substrate.

Abstract translation: 双面发光显示面板包括基板，多个顶部发射像素结构和多个底部发射像素结构。 顶部发射像素结构设置在衬底上，并且底部发射像素结构设置在衬底上。 顶部发射像素结构和底部发射像素结构交替地布置在衬底上。

公开(公告)号：US20140139985A1

公开(公告)日：2014-05-22

申请号：US14077217

申请日：2013-11-12

Applicant: Industrial Technology Research Institute

Inventor： Ping-I Shih

IPC: H05K7/06

CPC classification number: H05K5/063 ,  G02F1/133308 ,  G02F2001/133311 ,  H01L51/5246 ,  H01L2251/5338

Abstract: An environmental sensitive electronic device package includes a first substrate, a second substrate, an environmental sensitive electronic device, at least one side wall barrier structure, and a filler layer. The second substrate is disposed above the first substrate. The environmental sensitive electronic device is disposed on the first substrate and located between the first substrate and the second substrate. The side wall barrier structure is located between the first substrate and the second substrate and surrounds the environmental sensitive electronic device. The side wall barrier structure extends along a path, and the height of the side wall barrier structure varies along the path. The filler layer is located between the first substrate and the second substrate and covers the side wall barrier structure and the environmental sensitive electronic device.

Abstract translation: 环境敏感电子器件封装包括第一衬底，第二衬底，环境敏感电子器件，至少一个侧壁阻挡结构和填充层。 第二基板设置在第一基板的上方。 环境敏感电子器件设置在第一衬底上并位于第一衬底和第二衬底之间。 侧壁阻挡结构位于第一基板和第二基板之间并且环绕环境敏感的电子设备。 侧壁阻挡结构沿着路径延伸，并且侧壁阻挡结构的高度沿着路径变化。 填充层位于第一基板和第二基板之间，并且覆盖侧壁阻挡结构和环境敏感电子设备。