公开(公告)号：US20220358077A1

公开(公告)日：2022-11-10

申请号：US17314203

申请日：2021-05-07

Applicant: Infineon Technologies AG

Inventor： Andreas JANSEN ,  Richard HEINZ ,  Catalina-Petruta JUGLAN ,  Stephan LEISENHEIMER ,  Lacramioara Mihaela SMOCHINA

IPC: G06F13/42 ,  G06F13/374 ,  G06F13/40 ,  G06F9/30 ,  G06F9/32

Abstract: A serial peripheral interface (SPI) communication system includes a memory configured with a start register address and an end register address that define a register address range for a data operation; a chip select terminal configured to receive a chip select signal comprising an active and idle signal levels that define a plurality of chip select frames; a serial data input terminal configured to receive a master out, slave in (MOSI) signal, wherein the MOSI signal includes configuration information received in a first chip select frame of the data operation, wherein the configuration information includes an operation command bit indicating whether the data operation is a write operation or a read out operation and an auto-incrementation control bit indicating whether automatic register address incrementation across chip select frames is enabled or disabled; and a serial data output terminal configured to transmit a master in, slave out (MISO) signal.