公开(公告)号：US20220310435A1

公开(公告)日：2022-09-29

申请号：US17699768

申请日：2022-03-21

Applicant: Infineon Technologies AG

Inventor： Alexander Heinrich ,  Andreas Waterloo

IPC: H01L21/683

Abstract: A method includes forming a first tacking layer on a first connection partner, arranging a first layer on the first tacking layer, forming a second tacking layer on the first layer, arranging a second connection partner on the second tacking layer, heating the tacking layers and first layer, and pressing the first connection partner towards the second connection partner, with the first layer arranged between the connection partners, such that a permanent mechanical connection is formed between the connection partners. Either the tacking layers each include a second material evenly distributed within a first material, the second material being configured to act as or to release a reducing agent, or the tacking layers each include a mixture of at least a third material and a fourth material, the materials in the mixture chemically reacting with each other under the influence of heat such that a reducing agent is formed.

公开(公告)号：US12152133B2

公开(公告)日：2024-11-26

申请号：US17502859

申请日：2021-10-15

Applicant: Infineon Technologies AG

Inventor： Andreas Waterloo ,  Stefan Schwab

IPC: C08L101/12 ,  C08K9/12 ,  H01L23/29

Abstract: A package and method of manufacturing a package is disclosed. In one example, a package for encapsulating an electronic component includes a first cured mold compound, wherein the first cured mold compound includes a resin and filler particles embedded in the resin. The filler particles include a second cured mold compound. The first cured mold compound is based on a first curing act and the second cured mold compound is based on a second curing act different from the first curing act.

公开(公告)号：US20240266311A1

公开(公告)日：2024-08-08

申请号：US18422673

申请日：2024-01-25

Applicant: Infineon Technologies AG

Inventor： Alexander Roth ,  Andreas Waterloo

IPC: H01L23/00 ,  C22B5/02

CPC classification number: H01L24/32 ,  C22B5/02 ,  H01L24/27 ,  H01L2224/27334 ,  H01L2224/32225 ,  H01L2924/1203 ,  H01L2924/13055 ,  H01L2924/13091

Abstract: A solderable electronic device includes: a base including one or more of a semiconductor die and a power electronic substrate; a first layer arranged over the base, the first layer including a solid reducing agent; and a solder preform arranged over the first layer. The solid reducing agent is configured to reduce a solder material of the solder preform during a soldering process.