-
公开(公告)号:US08766444B2
公开(公告)日:2014-07-01
申请号:US13739389
申请日:2013-01-11
Applicant: Infineon Technologies AG
Inventor: Herbert Gietler , Gerhard Zojer , Benjamin Finke
CPC classification number: H01L23/5384 , H01L23/4824 , H01L23/522 , H01L24/06 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/00
Abstract: An integrated circuit as described herein includes an upper interconnect level including a continuous upper interconnect area, the continuous upper interconnect area including a plurality of upper contact openings. The integrated circuit further includes a lower interconnect level including a continuous lower interconnect area, the continuous lower interconnect area including a plurality of lower contact openings. First contacts extend through the lower contact openings to the upper interconnect area and second contact openings extend through the upper contact openings to the lower interconnect area.
Abstract translation: 如本文所述的集成电路包括上互连电平,其包括连续的上互连区域,所述连续上互连区域包括多个上接触开口。 集成电路还包括下连接级,其包括连续的下互连区域,连续的下互连区域包括多个下接触开口。 第一触点延伸穿过下接触开口到上互连区域,第二接触开口延伸通过上接触开口到下互连区域。
-
公开(公告)号:US20130127066A1
公开(公告)日:2013-05-23
申请号:US13739389
申请日:2013-01-11
Applicant: Infineon Technologies AG
Inventor: Herbert Gietler , Gerhard Zojer , Benjamin Finke
IPC: H01L23/538
CPC classification number: H01L23/5384 , H01L23/4824 , H01L23/522 , H01L24/06 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/00
Abstract: An integrated circuit as described herein includes an upper interconnect level including a continuous upper interconnect area, the continuous upper interconnect area including a plurality of upper contact openings. The integrated circuit further includes a lower interconnect level including a continuous lower interconnect area, the continuous lower interconnect area including a plurality of lower contact openings. First contacts extend through the lower contact openings to the upper interconnect area and second contact openings extend through the upper contact openings to the lower interconnect area.
Abstract translation: 如本文所述的集成电路包括包括连续上部互连区域的上部互连级别,连续的上部互连区域包括多个上部接触开口。 集成电路还包括下连接级,其包括连续的下互连区域,连续的下互连区域包括多个下接触开口。 第一触点延伸穿过下接触开口到上互连区域,第二接触开口延伸通过上接触开口到下互连区域。
-