公开(公告)号：US10516343B2

公开(公告)日：2019-12-24

申请号：US15446568

申请日：2017-03-01

Applicant: Infineon Technologies AG

Inventor： Juergen Kositza ,  Herbert Gietler ,  Harald Huber ,  Michael Lenz

IPC: H02M7/217 ,  H01L23/48 ,  H01L25/00 ,  H02M1/084 ,  H02M7/06 ,  H02M7/00 ,  H02M7/219 ,  H01L25/07

Abstract: A power semiconductor package includes a reference voltage terminal, a supply voltage terminal, a phase terminal, a first power transistor and a second power transistor. The first power transistor and the second power transistor are connected in series and form a low side switch and a high side switch of a half bridge circuit.

公开(公告)号：US20190027464A1

公开(公告)日：2019-01-24

申请号：US15656388

申请日：2017-07-21

Applicant: Infineon Technologies AG

Inventor： Martin Mischitz ,  Harald Huber ,  Michael Knabl ,  Claudia Sgiarovello ,  Caterina Travan ,  Andrew Wood

IPC: H01L23/00 ,  H01L25/065 ,  H01L25/00 ,  H01L23/31

Abstract: According to an embodiment of a method of manufacturing a plurality of semiconductor devices on a wafer, the method includes forming a structure layer comprising a plurality of same semiconductor device structures and providing a protective layer on the structure layer. The protective layer on a first one of the plurality of semiconductor device structures differs from the protective layer on a second one of the plurality of semiconductor device structures.

公开(公告)号：US20170257037A1

公开(公告)日：2017-09-07

申请号：US15446568

申请日：2017-03-01

Applicant: Infineon Technologies AG

Inventor： Juergen Kositza ,  Herbert Gietler ,  Harald Huber ,  Michael Lenz

IPC: H02M7/217 ,  H02M1/084 ,  H02M7/06

Abstract: A power semiconductor package includes a reference voltage terminal, a supply voltage terminal, a phase terminal, a first power transistor and a second power transistor. The first power transistor and the second power transistor are connected in series and form a low side switch and a high side switch of a half bridge circuit.

公开(公告)号：US10580753B2

公开(公告)日：2020-03-03

申请号：US15656388

申请日：2017-07-21

Applicant: Infineon Technologies AG

Inventor： Martin Mischitz ,  Harald Huber ,  Michael Knabl ,  Claudia Sgiarovello ,  Caterina Travan ,  Andrew Wood

IPC: H01L23/00 ,  H01L23/525 ,  H01L23/31 ,  H01L25/065 ,  H01L25/00

Abstract: According to an embodiment of a method of manufacturing a plurality of semiconductor devices on a wafer, the method includes forming a structure layer comprising a plurality of same semiconductor device structures and providing a protective layer on the structure layer. The protective layer on a first one of the plurality of semiconductor device structures differs from the protective layer on a second one of the plurality of semiconductor device structures.