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公开(公告)号:US20140329373A1
公开(公告)日:2014-11-06
申请号:US14332120
申请日:2014-07-15
Applicant: INFINEON TECHNOLOGIES AG
Inventor: Giuseppe Miccoli , Adolf Koller , Jayachandran Bhaskaran
IPC: H01L21/78
CPC classification number: H01L21/78 , B23K26/032 , B23K26/042 , B23K26/40 , B23K26/53 , B23K2101/40 , B23K2103/172 , B23K2103/50
Abstract: A method of dicing a semiconductor wafer includes forming a layer stack on a first main surface of a substrate. The layer stack and a portion of the substrate are etched according to a pattern defining an intended dicing location to obtain a trench structure. The substrate is irradiated with a laser beam to locally modify the substrate between a bottom of the trench structure and a second main surface of the substrate opposite to the first main surface.
Abstract translation: 切割半导体晶片的方法包括在基板的第一主表面上形成层叠体。 根据限定预定切割位置的图案蚀刻层叠层和基板的一部分以获得沟槽结构。 用激光束照射衬底以局部地修改沟槽结构的底部和与第一主表面相对的衬底的第二主表面之间的衬底。
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公开(公告)号:US11068344B2
公开(公告)日:2021-07-20
申请号:US16352783
申请日:2019-03-13
Applicant: Infineon Technologies AG
Inventor: Jan Otterstedt , Jayachandran Bhaskaran , Michael Goessel , Thomas Rabenalt
Abstract: A determination is made that error-correcting code functionality detected a first number of erroneous bits within a memory device. Bits within the memory device are evaluated to identify a subset of the bits as candidate bits. The candidate bits are evaluated to determine whether the error-correcting code functionality returns a non-error state, where no error correction is performed, based upon one or more combinations of candidate bits being inverted. Responsive to the error-correcting code functionality returning the non-error state for only one combination of the one or more combinations of candidate bits being inverted, the one combination of candidate bits is corrected.
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