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公开(公告)号：US11757465B2
公开(公告)日：2023-09-12
申请号：US17325409
申请日：2021-05-20
Applicant: Infineon Technologies AG
Inventor： Kyrylo Cherniak , Werner Hoellinger , Stefano Marsili , Volha Subotskaya
Abstract: A converter includes a switched capacitor circuit that includes at least one capacitor and a plurality of main switches to provide an output current in response to an input voltage applied to the switched capacitor circuit. The converter further includes one or more bypass transistor switches to selectively provide an additional output current. The converter includes a common controller that controls the plurality of main switches and the one or more bypass transistor switches.
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Patent Agency Ranking
公开(公告)号：US10305377B2
公开(公告)日：2019-05-28
申请号：US15710502
申请日：2017-09-20
Applicant: Infineon Technologies AG
Inventor： Kyrylo Cherniak , Werner Hoellinger , Gerhard Maderbacher , Stefano Marsili , Volha Subotskaya
Abstract: Representative implementations of devices and techniques may minimize switching losses and voltage ripple in a switched capacitor de-de converter. A digital controller is used to control switching, based on an existing load. In some examples, the digital controller may insert a dead-time phase in a switching period, which may reduce voltage ripple for a low output load current. In other examples, the digital controller may adjust the conductance of a plurality of sub-switches, where the plurality of sub-switches may include one or more sub-switches that have a higher on-resistance than other sub-switches. For example, a sub-switch may have an on-resistance that is a multiple of the on-resistance of other sub-switches.
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公开(公告)号：US20200321868A1
公开(公告)日：2020-10-08
申请号：US16372781
申请日：2019-04-02
Applicant: Infineon Technologies AG
Inventor： Vratislav Michal , Kyrylo Cherniak
IPC: H02M3/158
Abstract: A power stage of a voltage converter, including: a series capacitor having a first terminal coupled to a first switch node; a pair of second high-side switches coupled in series between a second switch node and a second terminal of the series capacitor; and a bias switch coupled between the first switch node and a middle node between the second high-side switches, wherein during operation, a voltage across each of the second high-side switches and the bias switch is less than a supply voltage.
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公开(公告)号：US20180013342A1
公开(公告)日：2018-01-11
申请号：US15710502
申请日：2017-09-20
Applicant: Infineon Technologies AG
Inventor： Kyrylo Cherniak , Werner Hoellinger , Gerhard Maderbacher , Stefano Marsili , Volha Subotskaya
CPC classification number: H02M3/07 , H02M1/14 , H02M2001/0054 , Y02B70/1491
Abstract: Representative implementations of devices and techniques may minimize switching losses and voltage ripple in a switched capacitor de-de converter. A digital controller is used to control switching, based on an existing load. In some examples, the digital controller may insert a dead-time phase in a switching period, which may reduce voltage ripple for a low output load current. In other examples, the digital controller may adjust the conductance of a plurality of sub-switches, where the plurality of sub-switches may include one or more sub-switches that have a higher on-resistance than other sub-switches. For example, a sub-switch may have an on-resistance that is a multiple of the on-resistance of other sub-switches.
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公开(公告)号：US20210367609A1
公开(公告)日：2021-11-25
申请号：US17325409
申请日：2021-05-20
Applicant: Infineon Technologies AG
Inventor： Kyrylo Cherniak , Werner Hoellinger , Stefano Marsili , Volha Subotskaya
Abstract: A converter includes a switched capacitor circuit that includes at least one capacitor and a plurality of main switches to provide an output current in response to an input voltage applied to the switched capacitor circuit. The converter further includes one or more bypass transistor switches to selectively provide an additional output current. The converter includes a common controller that controls the plurality of main switches and the one or more bypass transistor switches.
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公开(公告)号：US10833588B2
公开(公告)日：2020-11-10
申请号：US16372781
申请日：2019-04-02
Applicant: Infineon Technologies AG
Inventor： Vratislav Michal , Kyrylo Cherniak
IPC: H02M3/158
Abstract: A power stage of a voltage converter, including: a series capacitor having a first terminal coupled to a first switch node; a pair of second high-side switches coupled in series between a second switch node and a second terminal of the series capacitor; and a bias switch coupled between the first switch node and a middle node between the second high-side switches, wherein during operation, a voltage across each of the second high-side switches and the bias switch is less than a supply voltage.
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