公开(公告)号：US20200294956A1

公开(公告)日：2020-09-17

申请号：US16806844

申请日：2020-03-02

Applicant: Infineon Technologies AG

Inventor： Steffen Hartmann ,  Roland Speckels

IPC: H01L23/00

Abstract: An arrangement for joining two joining members includes a first part having a support surface, a first carrier element configured to carry at least one foil, a transportation unit configured to arrange the first carrier element such that the foil is arranged above the support surface in a vertical direction, and a second part configured to exert pressure to a joining stack, when the joining stack is arranged on the support surface. The joining stack includes a first joining member arranged on the support surface, a second joining member, and an electrically conductive connection layer arranged between the joining members. When pressure is exerted to the joining stack, the foil is arranged between the second part and the joining stack and is pressed onto the joining stack and the joining stack is pressed onto the first part, compressing the connection layer and forming a substance-to-substance bond between the joining members.

公开(公告)号：US20240387325A1

公开(公告)日：2024-11-21

申请号：US18652146

申请日：2024-05-01

Applicant: Infineon Technologies AG

Inventor： Andreas Grassmann ,  Steffen Hartmann

IPC: H01L23/473 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L25/065

Abstract: A power electronic system includes a semiconductor module that includes a power electronic substrate having opposite first and second sides, power semiconductor die arranged over the second side of the substrate, and an encapsulation encapsulating the power semiconductor dies. The first side of the power electronic substrate is at least partially exposed from a first side of the encapsulation. The semiconductor module is arranged over an exterior surface of a wall of a cooler configured for fluidic cooling, such that the first side of the power electronic substrate faces the wall. The cooler includes cooling structures arranged on an interior surface of the wall. A first portion of the wall directly below the power electronic substrate has a first wall thickness and a second portion of the wall laterally next to the first portion has a second wall thickness, the first wall thickness being greater than the second wall thickness.

公开(公告)号：US11676933B2

公开(公告)日：2023-06-13

申请号：US16806844

申请日：2020-03-02

Applicant: Infineon Technologies AG

Inventor： Steffen Hartmann ,  Roland Speckels

IPC: H01L23/00

CPC classification number: H01L24/75 ,  H01L24/83 ,  H01L24/32 ,  H01L2224/32225 ,  H01L2224/7555 ,  H01L2224/7565 ,  H01L2224/75252 ,  H01L2224/75301 ,  H01L2224/75821 ,  H01L2224/83053 ,  H01L2224/8384 ,  H01L2224/83203

Abstract: An arrangement for joining two joining members includes a first part having a support surface, a first carrier element configured to carry at least one foil, a transportation unit configured to arrange the first carrier element such that the foil is arranged above the support surface in a vertical direction, and a second part configured to exert pressure to a joining stack, when the joining stack is arranged on the support surface. The joining stack includes a first joining member arranged on the support surface, a second joining member, and an electrically conductive connection layer arranged between the joining members. When pressure is exerted on the joining stack, the foil is arranged between the second part and the joining stack and is pressed onto the joining stack and the joining stack is pressed onto the first part, compressing the connection layer and forming a bond between the joining members.