公开(公告)号：US20250169110A1

公开(公告)日：2025-05-22

申请号：US18922253

申请日：2024-10-21

Applicant: Innolux Corporation

Inventor： Cheng-Hsu Chou ,  I-Ho Shen ,  Chih-Hsiung Chang

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/423

Abstract: An electronic device including a substrate and an electronic element is provided. The electronic element is disposed on the substrate and includes a first gate electrode, a semiconductor pattern, a source electrode, a drain electrode and a second gate electrode. The semiconductor pattern includes an overlapping region, a first side region and a second side region. A portion of the semiconductor pattern overlapped with the first gate electrode is defined as the overlapping region. The first side region and the second side region are respectively connected to two opposite sides of the overlapping region in a first direction and respectively include two opposite first edges of the semiconductor pattern. The source electrode and the drain electrode are respectively electrically connected to the first side region and the second side region. At least a portion of the second gate electrode is overlapped with the second side region of the semiconductor pattern.

公开(公告)号：US12094983B2

公开(公告)日：2024-09-17

申请号：US17504759

申请日：2021-10-19

Applicant: InnoLux Corporation

Inventor： Chin-Lung Ting ,  Cheng-Hsu Chou ,  Ming-Chun Tseng ,  Yun-Sheng Chen ,  Chih-Hsiung Chang ,  Liang-Lu Chen

IPC: H01L29/786

CPC classification number: H01L29/78696 ,  H01L29/78618

Abstract: A display device is provided. The display device includes a substrate, a channel layer, a first metal layer, and a second metal layer. The channel layer is disposed on the substrate and includes a first channel layer and a second channel layer. The first metal layer is disposed on the channel layer and includes a first gate and a second gate. The second metal layer is disposed over the first metal layer and includes a first source, a first drain, and a second source. The first gate, the first source, the first drain, and the first channel layer form a first transistor. The second gate, the second source, the first drain, and the second channel layer form a second transistor. The first transistor and the second transistor are connected in parallel.