公开(公告)号：US20220122907A1

公开(公告)日：2022-04-21

申请号：US17425227

申请日：2019-02-22

Applicant: Intel Corporation

Inventor： Xiaoying TANG ,  200241 DING ,  Bin LIU ,  Yong SHE ,  Zhijun XU

IPC: H01L23/498 ,  H01L23/00

Abstract: Embodiments include semiconductor packages and a method of forming the semiconductor packages. A semiconductor package includes a package substrate with a top surface, a corner portion, and a plurality of solder balls on the top surface of the package substrate. The semiconductor package also includes a pattern on the corner portion of the package substrate. The pattern may have a width substantially equal to a width of the solder balls. The pattern may also include a continuous line having solder materials. The semiconductor package may include a plurality of conductive pads on the package substrate. The conductive pads may be coupled to the pattern. The pattern may have a z-height that is substantially equal to a z-height of the solder balls, and have one or more outer edges, where the outer edges of the pattern are sidewalls. The sidewalls of the pattern may be substantially vertical or tapered sidewalls.