公开(公告)号：US20240231473A1

公开(公告)日：2024-07-11

申请号：US18069269

申请日：2022-12-21

Applicant: Intel Corporation

Inventor： Patrick Kam-shing Leung ,  Akshay Parnami ,  Jianwei Dai ,  Saranya Sridaran Iyengar ,  Michael F. Mallen

IPC: G06F1/3296 ,  G06F1/3287

CPC classification number: G06F1/3296 ,  G06F1/3287

Abstract: Embodiments described herein may include apparatus, systems, techniques, and/or processes that are directed to adaptively determining an optimum time frame or demotion threshold for when to power down a voltage rail of an idle device. The demotion threshold is typically the point where the energy cost for maintaining power to the device is approximately the same as or exceeds the energy cost of removing power to the device. The demotion threshold may vary with system conditions and may be based on device leakage current, wake voltage, capacitance, voltage regulator power consumption, current workload and the like. A power control unit in the computing system may manage the voltage of the device and determine the optimum demotion threshold. The power control unit may rely on physical inputs such as fuses on a motherboard, system inputs supplied by a manufacturer, current condition inputs and may be implemented in the device's or the system's software or firmware. By calculating the adaptive demotion threshold, power may be optimized based on platform-to-platform design variation and/or device part-to-part variation.

公开(公告)号：US11269396B2

公开(公告)日：2022-03-08

申请号：US16147285

申请日：2018-09-28

Applicant: Intel Corporation

Inventor： Avinash Ananthakrishnan ,  Stephen Gunther ,  Amr Muhammad Lotfy El-Sayed ,  Akshay Parnami

IPC: G06F1/3234 ,  G06F1/3296 ,  G06F1/3228 ,  G06F1/324

Abstract: An apparatus is provided, where the apparatus includes a plurality of processing cores to execute a plurality of processes, a register to store an indicator that is to indicate a preference for either performance or energy efficiency, a first circuitry to determine an effective utilization of a first processing core, based on the indicator, and a second circuitry to select at least one of an operating voltage or an operating frequency of the first processing core, based at least in part on the effective utilization of the first processing core.