公开(公告)号：US09092632B2

公开(公告)日：2015-07-28

申请号：US13836092

申请日：2013-03-15

Applicant: Intel Corporation

Inventor： Allen R. Wishman ,  Sergiu D. Ghetie ,  Michael Neve De Mevergnies ,  Ulhas S. Warrier ,  Adil Karrar ,  Douglas R. Moran ,  Kirk Brannock

IPC: H04L29/06 ,  G06F21/60 ,  G06F21/57

CPC classification number: G06F21/60 ,  G06F21/572 ,  G06F21/64 ,  G06F21/74 ,  G06F2221/2137

Abstract: A method, apparatus, machine-readable medium, and system are disclosed. In one embodiment the method includes a processor. The processor includes switching a platform firmware update mechanism located in a computer platform to a platform firmware armoring technology (PFAT) mode on a boot of the computer platform. The computer platform includes a platform firmware storage location that stores a platform firmware. The method then persistently locks the platform firmware storage location in response to the platform firmware update mechanism switching to the PFAT mode. When persistently locked, writes are only allowed to the platform firmware storage location by an Authenticated Code Module in the running platform and only after a platform firmware update mechanism unlocking procedure.

Abstract translation: 公开了一种方法，装置，机器可读介质和系统。 在一个实施例中，该方法包括处理器。 处理器包括将计算机平台中的平台固件更新机制切换到计算机平台引导时的平台固件铠装技术（PFAT）模式。 计算机平台包括存储平台固件的平台固件存储位置。 该方法然后持续地锁定平台固件存储位置，以响应平台固件更新机制切换到PFAT模式。 当持续锁定时，只能在运行平台中的认证代码模块才允许平台固件存储位置写入，并且只有在平台固件更新机制解锁过程之后才能进行写操作。

公开(公告)号：US10515218B2

公开(公告)日：2019-12-24

申请号：US15283381

申请日：2016-10-01

Applicant: Intel Corporation

Inventor： Sergiu D Ghetie ,  Neeraj S. Upasani ,  Sagar V. Dalvi ,  David P. Turley ,  Jeanne Guillory ,  Mark D. Chubb ,  Allen R. Wishman ,  Shahrokh Shahidzadeh

IPC: G06F21/57 ,  G06F21/72

Abstract: Embodiments detailed herein include, but are not limited to, a hardware processor to execute instructions and security circuitry to perform pre-boot operations including signature verification of a portion of firmware in a firmware storage hardware and initiating recovery upon a signature verification failure. The hardware processor comprises a plurality of cores in some embodiments. The hardware processor a multicore processor in some embodiments.