公开(公告)号：US11703927B2

公开(公告)日：2023-07-18

申请号：US16833328

申请日：2020-03-27

Applicant: Intel Corporation

Inventor： Oren Zonensain ,  Roman Rechter ,  Almog Reshef ,  Maxim Levit ,  Nadav Shulman ,  Efraim Rotem

IPC: G06F1/00 ,  G06F11/30 ,  G06F1/28 ,  G01R31/52

CPC classification number: G06F1/28 ,  G01R31/52

Abstract: A performance management scheme for a processor based on leakage current measurement in field. The scheme performs the operations of detection and correction. The operation of detection measures per core leakage current in the field (e.g., using voltage regulator electrical current counters). The operation of correction changes the processor power management behavior. For example, processor cores showing high leakage degradation may be logically swapped with cores showing low leakage degradation.

公开(公告)号：US20200225723A1

公开(公告)日：2020-07-16

申请号：US16833328

申请日：2020-03-27

Applicant: Intel Corporation

Inventor： Oren Zonensain ,  Roman Rechter ,  Almog Reshef ,  Maxim Levit ,  Nadav Shulman ,  Efraim Rotem

IPC: G06F1/28 ,  G01R31/52

Abstract: A performance management scheme for a processor based on leakage current measurement in field. The scheme performs the operations of detection and correction. The operation of detection measures per core leakage current in the field (e.g., using voltage regulator electrical current counters). The operation of correction changes the processor power management behavior. For example, processor cores showing high leakage degradation may be logically swapped with cores showing low leakage degradation.