公开(公告)号：US20190042480A1

公开(公告)日：2019-02-07

申请号：US15889116

申请日：2018-02-05

Applicant: Intel Corporation

Inventor： Amirali KHATIB ZADEH ,  Pavel POLIAKOV ,  Shekoufeh QAWAMI

IPC: G06F12/14 ,  G11C29/44 ,  G06F21/44

Abstract: Examples include techniques for determining validity of a memory used with a memory controller. Examples include a system having a memory device including a non-volatile memory and a memory controller, where the memory controller includes a validation component including a hash function and a hash table. In embodiments, the validation component performs, during a time of manufacturing of the memory controller, a test of the non-volatile memory to produce first test results, generates a first hash of the first test results using the hash function, and stores the first hash in the hash table. Later, the validation component performs, during a time of use of the memory controller after the time of manufacturing, the test of the non-volatile memory to produce second test results, generates a second hash of the second test results using the hash function, compares the first hash from the hash table with the second hash, and indicates an invalid memory when the first hash does not match the second hash.

公开(公告)号：US20180287793A1

公开(公告)日：2018-10-04

申请号：US15476739

申请日：2017-03-31

Applicant: INTEL CORPORATION

Inventor： Amirali KHATIB ZADEH ,  Shekoufeh QAWAMI ,  Abhranil MAITI

IPC: H04L9/08 ,  G11C13/00 ,  G06F12/14

Abstract: In one embodiment, an unpredictable nature of the storage properties in what is otherwise referred to as the “lockout period” following the programming of a non-volatile bitcell in a bitcell programming interval, is advantageously utilized in a random number generation mode to read random numbers from the memory. Accordingly, instead of locking out read operations in a lockout interval, a read operation may be performed in that or a similarly placed interval to read a bit state of the bitcell, which bit state is random in nature. The instability of the storage property varies from bitcell to bitcell and therefore may be used to generate a set of random bits from a block of bitcells. Other aspects are described herein.