公开(公告)号：US20250106994A1

公开(公告)日：2025-03-27

申请号：US18373883

申请日：2023-09-27

Applicant: Intel Corporation

Inventor： Mukund AYALASOMAYAJULA ,  Jiaqi WU ,  Andrew W. CARLSON ,  Matthew MAGNAVITA ,  Zewei WANG ,  Xiao LU ,  George ROBINSON ,  Brian MOODY ,  Fatemeh RAHIMI ,  Chase Williams CHALLE ,  Prince Shiva CHAUDHARY ,  Dhruv Kishor MALDE ,  Mohamed ELHEBEARY

IPC: H05K1/11 ,  H01L23/00

Abstract: Embodiments include an apparatus with interconnects that have different structures. In an embodiment, the apparatus comprises a substrate and a first interconnect on the substrate, a second interconnect on the substrate, and a third interconnect on the substrate. In an embodiment, the first interconnect, the second interconnect, and the third interconnect are all different from each other.

公开(公告)号：US20250105114A1

公开(公告)日：2025-03-27

申请号：US18373879

申请日：2023-09-27

Applicant: Intel Corporation

Inventor： Alexander W. HUETTIS ,  Patrick NARDI ,  Abid AMEEN ,  Jiaqi WU ,  Andrew W. CARLSON

IPC: H01L23/498

Abstract: Embodiments disclosed herein include systems with interconnects that comprise four or more different interconnect types. In an embodiment, an apparatus comprises a substrate and a ball grid array across a surface of the substrate. In an embodiment, the ball grid array comprises first interconnects in a first region of the ball grid array, second interconnects in a second region of the ball grid array, third interconnects in a third region of the ball grid array, and fourth interconnects in a fourth region of the ball grid array. In an embodiment, the first interconnects, the second interconnects, the third interconnects, and the fourth interconnects all have a difference in one or more of a composition, a dimension, and a structure.