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公开(公告)号:US20240162134A1
公开(公告)日:2024-05-16
申请号:US18418154
申请日:2024-01-19
Applicant: Intel Corporation
Inventor: Xiao LU , Jiongxin LU , Christopher COMBS , Alexander HUETTIS , John HARPER , Jieping ZHANG , Nachiket R. RARAVIKAR , Pramod MALATKAR , Steven A. KLEIN , Carl DEPPISCH , Mohit SOOD
IPC: H01L23/498 , B23K3/06 , H01L23/538
CPC classification number: H01L23/49833 , B23K3/0623 , H01L23/49822 , H01L23/4985 , H01L23/5387
Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, the electronic package comprises a first substrate; a second substrate; and an array of interconnects electrically coupling the first substrate to the second substrate. In an embodiment, the array of interconnects comprises first interconnects, wherein the first interconnects have a first volume and a first material composition, and second interconnects, wherein the second interconnects have a second volume and a second material composition, and wherein the first volume is different than the second volume and/or the first material composition is different than the second material composition.
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公开(公告)号:US20250106994A1
公开(公告)日:2025-03-27
申请号:US18373883
申请日:2023-09-27
Applicant: Intel Corporation
Inventor: Mukund AYALASOMAYAJULA , Jiaqi WU , Andrew W. CARLSON , Matthew MAGNAVITA , Zewei WANG , Xiao LU , George ROBINSON , Brian MOODY , Fatemeh RAHIMI , Chase Williams CHALLE , Prince Shiva CHAUDHARY , Dhruv Kishor MALDE , Mohamed ELHEBEARY
Abstract: Embodiments include an apparatus with interconnects that have different structures. In an embodiment, the apparatus comprises a substrate and a first interconnect on the substrate, a second interconnect on the substrate, and a third interconnect on the substrate. In an embodiment, the first interconnect, the second interconnect, and the third interconnect are all different from each other.
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公开(公告)号:US20210082798A1
公开(公告)日:2021-03-18
申请号:US16575307
申请日:2019-09-18
Applicant: Intel Corporation
Inventor: Xiao LU , Jiongxin LU , Christopher COMBS , Alexander HUETTIS , John HARPER , Jieping ZHANG , Nachiket R. RARAVIKAR , Pramod MALATKAR , Steven A. KLEIN , Carl DEPPISCH , Mohit SOOD
IPC: H01L23/498 , B23K3/06 , H01L23/538
Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, the electronic package comprises a first substrate; a second substrate; and an array of interconnects electrically coupling the first substrate to the second substrate. In an embodiment, the array of interconnects comprises first interconnects, wherein the first interconnects have a first volume and a first material composition, and second interconnects, wherein the second interconnects have a second volume and a second material composition, and wherein the first volume is different than the second volume and/or the first material composition is different than the second material composition.
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公开(公告)号:US20240304506A1
公开(公告)日:2024-09-12
申请号:US18117818
申请日:2023-03-06
Applicant: Intel Corporation
Inventor: Sangeon LEE , Tingting GAO , Xiao LU , Matthew MAGNAVITA , Khalid ABDELAZIZ
IPC: H01L23/29 , H01L23/31 , H01L23/498
CPC classification number: H01L23/296 , H01L23/3107 , H01L23/49811 , H01L23/49894
Abstract: Embodiments disclosed herein include socket interconnects with liquid metal. In an embodiment, a board comprises a substrate. A pad may be provided over the substrate. In an embodiment, a confinement layer is over the substrate, where the confinement layer defines a cavity over the pad. In an embodiment, a liquid metal is on the pad within the cavity. In an embodiment, a protective layer is provided over the liquid metal.
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公开(公告)号:US20190206821A1
公开(公告)日:2019-07-04
申请号:US15859313
申请日:2017-12-29
Applicant: Intel Corporation
Inventor: Huxiao XIE , Amram EITAN , Xiao LU
IPC: H01L23/00
CPC classification number: H01L24/13 , H01L24/11 , H01L24/16 , H01L24/81 , H01L2224/10165 , H01L2224/1132 , H01L2224/11332 , H01L2224/13211 , H01L2224/13311 , H01L2224/13347 , H01L2224/13355 , H01L2224/13411 , H01L2224/13499 , H01L2224/16237 , H01L2224/165 , H01L2224/80051 , H01L2224/8114 , H01L2224/81192 , H01L2224/81815 , H01L2924/00014 , H01L2924/014
Abstract: Apparatuses, systems, and methods associated with spacer elements for maintaining a distance between a substrate and component during reflow are disclosed herein. In embodiments, a substrate assembly may include a substrate and a component. The component may be coupled to the substrate via a solder joint, wherein the solder joint may include a spacer element and solder, the spacer element to maintain a distance between the substrate and the component. Other embodiments may be described and/or claimed.
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