公开(公告)号：US20250106994A1

公开(公告)日：2025-03-27

申请号：US18373883

申请日：2023-09-27

Applicant: Intel Corporation

Inventor： Mukund AYALASOMAYAJULA ,  Jiaqi WU ,  Andrew W. CARLSON ,  Matthew MAGNAVITA ,  Zewei WANG ,  Xiao LU ,  George ROBINSON ,  Brian MOODY ,  Fatemeh RAHIMI ,  Chase Williams CHALLE ,  Prince Shiva CHAUDHARY ,  Dhruv Kishor MALDE ,  Mohamed ELHEBEARY

IPC: H05K1/11 ,  H01L23/00

Abstract: Embodiments include an apparatus with interconnects that have different structures. In an embodiment, the apparatus comprises a substrate and a first interconnect on the substrate, a second interconnect on the substrate, and a third interconnect on the substrate. In an embodiment, the first interconnect, the second interconnect, and the third interconnect are all different from each other.

公开(公告)号：US20240304506A1

公开(公告)日：2024-09-12

申请号：US18117818

申请日：2023-03-06

Applicant: Intel Corporation

Inventor： Sangeon LEE ,  Tingting GAO ,  Xiao LU ,  Matthew MAGNAVITA ,  Khalid ABDELAZIZ

IPC: H01L23/29 ,  H01L23/31 ,  H01L23/498

CPC classification number: H01L23/296 ,  H01L23/3107 ,  H01L23/49811 ,  H01L23/49894

Abstract: Embodiments disclosed herein include socket interconnects with liquid metal. In an embodiment, a board comprises a substrate. A pad may be provided over the substrate. In an embodiment, a confinement layer is over the substrate, where the confinement layer defines a cavity over the pad. In an embodiment, a liquid metal is on the pad within the cavity. In an embodiment, a protective layer is provided over the liquid metal.