公开(公告)号：US10673774B2

公开(公告)日：2020-06-02

申请号：US16140332

申请日：2018-09-24

Applicant: Intel Corporation

Inventor： Ehud Udi Shoor ,  Ari Sharon

IPC: H04L25/03 ,  H04L12/863 ,  H04L1/00 ,  G06F13/40 ,  G06F1/04 ,  H04B15/00 ,  H04L12/861

Abstract: Described is a low latency re-timer for systems supporting spread spectrum clocking. The re-timer comprises: a first clock frequency estimator to estimate a frequency of a receive clock (RX CLK) and to provide a first timestamp associated with a first clock that underwent spread spectrum; a second clock frequency estimator to estimate a frequency of a transmit clock (TX CLK) and to provide a second timestamp associated with a second clock that underwent spread spectrum; and a comparator to compare the first timestamp with the second timestamp.

公开(公告)号：US20180059156A1

公开(公告)日：2018-03-01

申请号：US15247715

申请日：2016-08-25

Applicant: Intel Corporation

Inventor： Gregory Zabolotov ,  Gil Afriat ,  Ari Sharon

IPC: G01R25/00 ,  H04B17/21 ,  H04B17/29

CPC classification number: G01R25/00 ,  H04B17/21 ,  H04B17/29

Abstract: An apparatus is provided which comprises: an amplifier; a first slicer coupled to the amplifier; a de-serializer coupled to an output of the first slicer; a multiplexer which is operable to select one of data or a test signal for the amplifier; a filter coupled to an input of the multiplexer to provide test signal; and a frequency modulator coupled to the filter, wherein the frequency modulator is operable to modulate frequency of the test signal. An apparatus is also provided which comprises: an analog multiplexer having a first input to receive serial data, and a second input; an analog front-end (AFE) coupled to an output of the analog multiplexer; and a filter coupled to the second input of the analog multiplexer.

公开(公告)号：US10139438B2

公开(公告)日：2018-11-27

申请号：US15247715

申请日：2016-08-25

Applicant: Intel Corporation

Inventor： Gregory Zabolotov ,  Gil Afriat ,  Ari Sharon

IPC: G01R25/00 ,  H04B17/21 ,  H04B17/29

Abstract: An apparatus is provided which comprises: an amplifier; a first slicer coupled to the amplifier; a de-serializer coupled to an output of the first slicer; a multiplexer which is operable to select one of data or a test signal for the amplifier; a filter coupled to an input of the multiplexer to provide test signal; and a frequency modulator coupled to the filter, wherein the frequency modulator is operable to modulate frequency of the test signal. An apparatus is also provided which comprises: an analog multiplexer having a first input to receive serial data, and a second input; an analog front-end (AFE) coupled to an output of the analog multiplexer; and a filter coupled to the second input of the analog multiplexer.

公开(公告)号：US10129166B2

公开(公告)日：2018-11-13

申请号：US15465396

申请日：2017-03-21

Applicant: Intel Corporation

Inventor： Ehud Udi Shoor ,  Ari Sharon

IPC: H04L12/863 ,  H04L25/03 ,  H04L1/00 ,  G06F13/40 ,  G06F1/04 ,  H04B15/00

Abstract: Described is a low latency re-timer for systems supporting spread spectrum clocking. The re-timer comprises: a first clock frequency estimator to estimate a frequency of a receive clock (RX CLK) and to provide a first timestamp associated with a first clock that underwent spread spectrum; a second clock frequency estimator to estimate a frequency of a transmit clock (TX CLK) and to provide a second timestamp associated with a second clock that underwent spread spectrum; and a comparator to compare the first timestamp with the second timestamp.