公开(公告)号：US20220308882A1

公开(公告)日：2022-09-29

申请号：US17214823

申请日：2021-03-27

Applicant: Intel Corporation

Inventor： JONATHAN COMBS ,  MICHAEL CHYNOWETH ,  BEEMAN STRONG ,  CHARLIE HEWETT ,  PATRICK KONSOR ,  VIDISHA CHIRRA ,  ASAVARI PARANJAPE ,  AHMAD YASIN

IPC: G06F9/38 ,  G06F12/0802 ,  G06F11/30 ,  G06F11/34

Abstract: Systems, methods, and apparatuses relating to circuitry to implement precise last branch record event logging in a processor are described. In one embodiment, a hardware processor core includes an execution circuit to execute instructions, a retirement circuit to retire executed instructions, a status register, and a last branch record circuit to, in response to retirement by the retirement circuit of a first taken branch instruction, start a cycle timer and a performance monitoring event counter, and in response to retirement by the retirement circuit of a second taken branch instruction, that is a next taken branch instruction in program order after the first taken branch instruction, write values from the cycle timer and the performance monitoring event counter into a first entry in the status register and clear the values from the cycle timer and the performance monitoring event counter.

公开(公告)号：US20200241997A1

公开(公告)日：2020-07-30

申请号：US16845512

申请日：2020-04-10

Applicant: Intel Corporation

Inventor： MICHAEL LEMAY ,  BEEMAN STRONG

IPC: G06F11/34 ,  G06F11/30 ,  G06F21/57 ,  G06F21/56

Abstract: Processor trace systems and methods are described. For example, one embodiment comprises executing instrumented code by a compiler, the instrumented code including at least one call to un-instrumented code. The compiler can determine the at least one call to un-instrumented code is a next call to be executed. A resume tracing instruction can be inserted into the instrumented code prior to the at least one call to the un-instrumented code. The resume tracing instruction can be executed to selectively add processor tracing to the at least one call to the un-instrumented code, and the at least one call to the un-instrumented code can be executed.

公开(公告)号：US20190205238A1

公开(公告)日：2019-07-04

申请号：US15859142

申请日：2017-12-29

Applicant: Intel Corporation

Inventor： MICHAEL LEMAY ,  BEEMAN STRONG

IPC: G06F11/34 ,  G06F21/57 ,  G06F11/30

CPC classification number: G06F11/3466 ,  G06F11/3024 ,  G06F21/577 ,  G06F2221/033

Abstract: Processor trace systems and methods are described. For example, one embodiment comprises executing instrumented code by a compiler, the instrumented code including at least one call to un-instrumented code. The compiler can determine the at least one call to un-instrumented code is a next call to be executed. A resume tracing instruction can be inserted into the instrumented code prior to the at least one call to the un-instrumented code. The resume tracing instruction can be executed to selectively add processor tracing to the at least one call to the un-instrumented code, and the at least one call to the un-instrumented code can be executed.