公开(公告)号：US20240303406A1

公开(公告)日：2024-09-12

申请号：US18665300

申请日：2024-05-15

Applicant: Intel Corporation

Inventor： Yi Peng ,  Brandon Lewis Gordon

IPC: G06F30/343 ,  G06F30/327 ,  G06F30/3308 ,  G06F30/367 ,  G06F30/398

CPC classification number: G06F30/343 ,  G06F30/327 ,  G06F30/3308 ,  G06F30/367 ,  G06F30/398

Abstract: A system includes an integrated circuit device configured to implement a circuit design. The integrated circuit device includes a communication interface configured to receive the circuit design in a configuration bitstream and instrumentation logic in the configuration bitstream and signal collector block configured to collect signal data based on the instrumentation logic during implementation of the circuit design.

公开(公告)号：US12014129B2

公开(公告)日：2024-06-18

申请号：US17033208

申请日：2020-09-25

Applicant: Intel Corporation

Inventor： Yi Peng ,  Brandon Lewis Gordon

IPC: G06F30/343 ,  G06F30/327 ,  G06F30/3308 ,  G06F30/367 ,  G06F30/398

CPC classification number: G06F30/343 ,  G06F30/327 ,  G06F30/3308 ,  G06F30/367 ,  G06F30/398

Abstract: A system includes an integrated circuit device configured to implement a circuit design. The integrated circuit device includes a communication interface configured to receive the circuit design in a configuration bitstream and instrumentation logic in the configuration bitstream and signal collector block configured to collect signal data based on the instrumentation logic during implementation of the circuit design.

公开(公告)号：US20210012051A1

公开(公告)日：2021-01-14

申请号：US17033208

申请日：2020-09-25

Applicant: Intel Corporation

Inventor： Yi Peng ,  Brandon Lewis Gordon

IPC: G06F30/343 ,  G06F30/331

Abstract: A system includes an integrated circuit device configured to implement a circuit design. The integrated circuit device includes a communication interface configured to receive the circuit design in a configuration bitstream and instrumentation logic in the configuration bitstream and signal collector block configured to collect signal data based on the instrumentation logic during implementation of the circuit design.

公开(公告)号：US12105657B2

公开(公告)日：2024-10-01

申请号：US17133954

申请日：2020-12-24

Applicant: Intel Corporation

Inventor： Krishna Kumar Nagar ,  Brandon Lewis Gordon

IPC: G06F13/40 ,  G06F1/12

CPC classification number: G06F13/4027 ,  G06F1/12

Abstract: Bus interface protocols allow users to transmit data from one IP to another. Allowing definition of multiple per-symbol and per-packet user signals allows users to append information with each segment of data or transmit additional information pertaining to the whole packet of data, respectively. This provides finer granularity and control over the information.