公开(公告)号：US11422615B2

公开(公告)日：2022-08-23

申请号：US16741215

申请日：2020-01-13

Applicant: Intel Corporation

Inventor： Rajeev D. Muralidhar ,  Harinarayanan Seshadri ,  Vishwesh M. Rudramuni ,  Richard Quinzio ,  Christophe Fiat ,  Aymen Zayet ,  Youvedeep Singh ,  Illyas M. Mansoor

IPC: G06F1/32 ,  G06F1/3287 ,  G06F1/3234 ,  G06F1/3206

Abstract: Methods and apparatus relating to platform power consumption reduction via power state switching are described. In one embodiment, control logic causes a processor to enter a first low power consumption state (e.g., S0ix) instead of a second low power consumption state (e.g., S3) based on whether a threshold time period exists between a first wake event (e.g., corresponding to a first one of one or more awake requests) and a second wake event (e.g., corresponding to a second one of the one or more awake requests). Other embodiments are also claimed and disclosed.

公开(公告)号：US10564705B2

公开(公告)日：2020-02-18

申请号：US15984185

申请日：2018-05-18

Applicant: Intel Corporation

Inventor： Rajeev D. Muralidhar ,  Harinarayanan Seshadri ,  Vishwesh M. Rudramuni ,  Richard Quinzio ,  Christophe Fiat ,  Aymen Zayet ,  Youvedeep Singh ,  Illyas M. Mansoor

IPC: G06F1/32 ,  G06F1/3287 ,  G06F1/3234 ,  G06F1/3206

Abstract: Methods and apparatus relating to platform power consumption reduction via power state switching are described. In one embodiment, control logic causes a processor to enter a first low power consumption state (e.g., S0ix) instead of a second low power consumption state (e.g., S3) based on whether a threshold time period exists between a first wake event (e.g., corresponding to a first one of one or more awake requests) and a second wake event (e.g., corresponding to a second one of the one or more awake requests). Other embodiments are also claimed and disclosed.

公开(公告)号：US10007323B2

公开(公告)日：2018-06-26

申请号：US14139864

申请日：2013-12-23

Applicant: Intel Corporation

Inventor： Rajeev D. Muralidhar ,  Harinarayanan Seshadri ,  Vishwesh M. Rudramuni ,  Richard Quinzio ,  Christophe Fiat ,  Aymen Zayet ,  Youvedeep Singh ,  Illyas M. Mansoor

IPC: G06F1/32

CPC classification number: G06F1/3287 ,  G06F1/3206 ,  G06F1/3265 ,  Y02D10/153 ,  Y02D10/171

Abstract: Methods and apparatus relating to platform power consumption reduction via power state switching are described. In one embodiment, control logic causes a processor to enter a first low power consumption state (e.g., S0ix) instead of a second low power consumption state (e.g., S3) based on whether a threshold time period exists between a first wake event (e.g., corresponding to a first one of one or more awake requests) and a second wake event (e.g., corresponding to a second one of the one or more awake requests). Other embodiments are also claimed and disclosed.