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公开(公告)号:US10218739B2
公开(公告)日:2019-02-26
申请号:US15049519
申请日:2016-02-22
Applicant: Intel Corporation
Inventor: Vinodh Gopal , Christopher F. Clark , Gilbert M. Wolrich , Wajdi K. Feghali
Abstract: Methods and apparatus to perform string matching for network packet inspection are disclosed. In some embodiments there is a set of string matching slice circuits, each slice circuit of the set being configured to perform string matching steps in parallel with other slice circuits. Each slice circuit may include an input window storing some number of bytes of data from an input data steam. The input window of data may be padded if necessary, and then multiplied by a polynomial modulo an irreducible Galois-field polynomial to generate a hash index. A storage location of a memory corresponding to the hash index may be accessed to generate a slice-hit signal of a set of H slice-hit signals. The slice-hit signal may be provided to an AND-OR logic array where the set of H slice-hit signals is logically combined into a match result.