公开(公告)号：US20180005947A1

公开(公告)日：2018-01-04

申请号：US15201337

申请日：2016-07-01

Applicant: Intel Corporation

Inventor： Vijay KASTURI ,  Ana M. YEPES ,  Chung-Hao CHEN ,  Bradley A. JACKSON

IPC: H01L23/538 ,  H01L23/15 ,  H01L21/48

CPC classification number: H01L23/5385 ,  H01L21/4853 ,  H01L21/4857 ,  H01L23/15 ,  H01L23/5387 ,  H01L2224/16225

Abstract: Techniques and mechanisms for interconnecting circuitry disposed on a transparent substrate. In an embodiment, a multilayer circuit is bonded to the transparent substrate, the multilayer circuit including conductive traces that are variously offset at different respective levels from a side of the transparent substrate. Circuit components, such as packaged or unpackaged integrated circuit devices, are coupled each to respective input and/or output (IO) contacts of the multilayer circuit, where the conductive traces and the IO contacts interconnect the circuit components with each other. In another embodiment, the multilayer circuit is a flexible circuit that is bent to interconnect circuit components which are disposed on opposite respective sides of the transparent substrate.