公开(公告)号：US20190393165A1

公开(公告)日：2019-12-26

申请号：US16481031

申请日：2017-03-30

Applicant: Intel Corporation

Inventor： Kaladhar RADHAKRISHNAN ,  Jaejin LEE ,  Hao-Han HSU ,  Chung-Hao J. CHEN ,  Dong-Ho HAN

IPC: H01L23/552 ,  H01L23/498 ,  H01L25/18 ,  H05K1/18 ,  H01L21/48

Abstract: Semiconductor packages and a method of forming a semiconductor package are described. The semiconductor package has a foundation layer, a conductive layer formed in the foundation layer, and a magnetic layer formed between the conductive and the foundation layer. The conductive layer and the magnetic layer are coupled to form a low-profile inductor shield. The semiconductor package also has a dielectric layer formed between the magnetic and foundation layer. The foundation layer is mounted between a motherboard and a semiconductor die, where the foundation layer is attached to the motherboard with solder balls. Accordingly, the low-profile inductor shield may include a z-height that is less than a z-height of the solder balls. The low-profile inductor shield may have solder pads that are coupled to the conductive layer. The foundation layer may include at least one of voltage regulator and inductor, where the inductor is located above the low-profile inductor shield.