公开(公告)号：US20170085243A1

公开(公告)日：2017-03-23

申请号：US14860318

申请日：2015-09-21

Applicant: Intel Corporation

Inventor： BEOM-TAEK LEE ,  DHANYA ATHREYA ,  KEMAL AYGUN ,  SUBAS BASTOLA

IPC: H03H7/38

CPC classification number: H01P5/028

Abstract: One embodiment provides an apparatus. The apparatus includes an impedance matching interconnect having a first end and a second end. The impedance matching interconnect includes an interface trace having a first width at the first end and a second width at the second end, the first width less than the second width. The impedance matching interconnect further includes a first dielectric layer adjacent the interface trace; a first reference plane adjacent the first dielectric layer; at least one via adjacent the first reference plane; and a second reference plane adjacent the at least one via, the at least one via to couple the first reference plane and the second reference plane. A first distance between the interface trace and the first reference plane is less than a second distance between the interface trace and the second reference plane.