公开(公告)号：US12230988B2

公开(公告)日：2025-02-18

申请号：US17383865

申请日：2021-07-23

Applicant: Intel Corporation

Inventor： Adrian Mocanu ,  Zeljko Zupanc ,  Derrick Wilson ,  Andrew Morning-Smith

IPC: G11C5/14 ,  G11C5/10 ,  H02J7/00 ,  H02J7/34

Abstract: Systems, apparatuses and methods may provide for technology that applies a constant current to a capacitor, wherein the constant current causes a linear voltage increase in the capacitor, and determines a capacitance based on the constant current, a voltage change in the capacitor during the linear voltage increase, and a time change corresponding to the voltage change.

公开(公告)号：US20210351595A1

公开(公告)日：2021-11-11

申请号：US17383865

申请日：2021-07-23

Applicant: Intel Corporation

Inventor： Adrian Mocanu ,  Zeljko Zupanc ,  Derrick Wilson ,  Andrew Morning-Smith

IPC: H02J7/00 ,  G11C5/14

Abstract: Systems, apparatuses and methods may provide for technology that applies a constant current to a capacitor, wherein the constant current causes a linear voltage increase in the capacitor, and determines a capacitance based on the constant current, a voltage change in the capacitor during the linear voltage increase, and a time change corresponding to the voltage change.

公开(公告)号：US10936049B2

公开(公告)日：2021-03-02

申请号：US16396557

申请日：2019-04-26

Applicant: Intel Corporation

Inventor： Adrian Mocanu ,  Andrew Morning-Smith ,  Zeljko Zupanc ,  Derrick Wilson

IPC: G06F3/06 ,  G06F1/3296 ,  G06F1/3234

Abstract: An apparatus is described. The apparatus includes a power management integrated circuit (PMIC) semiconductor chip having logic circuitry to implement a PMIC/PMIC interface having a downstream signal line and an upstream signal line. The downstream signal line to communicate any of multiple states that a downstream PMIC semiconductor chip is to implement with one of multiple voltage levels, where, different ones of the multiple voltage levels correspond to different ones of the multiple states. The upstream signal line is to communicate whether or not the downstream PMIC semiconductor chip is ready to receive a next one of the multiple voltage levels.