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公开(公告)号:US20220256715A1
公开(公告)日:2022-08-11
申请号:US17390601
申请日:2021-07-30
Applicant: Intel Corporation
Inventor: Divya MANI , William J. LAMBERT , Shawna LIFF , Sergio A. CHAN ARGUEDAS , Robert L. SANKMAN
IPC: H05K3/34
Abstract: Embodiments of the invention include a mmWave transceiver and methods of forming such devices. In an embodiment, the mmWave transceiver includes an RF module. The RF module may include a package substrate, a plurality of antennas formed on the package substrate, and a die attached to a surface of the package substrate. In an embodiment, the mmWave transceiver may also include a mainboard mounted to the RF module with one or more solder balls. In an embodiment, a thermal feature is embedded within the mainboard, and the thermal feature is separated from the die by a thermal interface material (TIM) layer. According to an embodiment, the thermal features are slugs and/or vias. In an embodiment, the die compresses the TIM layer resulting in a TIM layer with minimal thickness.
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公开(公告)号:US20210259134A1
公开(公告)日:2021-08-19
申请号:US16794747
申请日:2020-02-19
Applicant: Intel Corporation
Inventor: Aastha UPPAL , Divya MANI , Je-Young CHANG
IPC: H05K7/20
Abstract: Embodiments disclosed herein include an integrated heat spreader (IHS). In an embodiment, the IHS comprises a main body, where the main body comprises a first surface and a second surface opposite from the second surface. In an embodiment, the IHS further and a support extending from the first surface of the main body. In an embodiment, the support comprises a shell, and a layer over an interior surface of the shell.
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公开(公告)号:US20210111091A1
公开(公告)日:2021-04-15
申请号:US16600107
申请日:2019-10-11
Applicant: Intel Corporation
Inventor: Aastha UPPAL , Divya MANI , Je-Young CHANG
IPC: H01L23/367 , H01L25/065 , H01L23/433 , H01L23/373 , H01L23/10 , H01L21/48 , H01L25/00
Abstract: Embodiments include semiconductor packages. A semiconductor package include a high-power electronic component and an embedded heat spreader (EHS) in a package substrate. The EHS is adjacent to the high-power electronic component. The semiconductor package includes a plurality of thermal interconnects below the EHS and the package substrate, and a plurality of dies on the package substrate. The thermal interconnects is coupled to the EHS. The EHS is below the high-power electronic component and embedded within the package substrate. The high-power electronic component has a bottom surface substantially proximate to a top surface of the EHS. The EHS is a copper heat sink, and the high-power electronic component is an air core inductor or a voltage regulator. The thermal interconnects are comprised of thermal ball grid array balls or thermal adhesive materials. The thermal interconnects couple a bottom surface of the package substrate to a top surface of a substrate.
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