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公开(公告)号:US20190227841A1
公开(公告)日:2019-07-25
申请号:US16373501
申请日:2019-04-02
Applicant: Intel Corporation
Inventor: John MORAN , Ireneusz SOBANSKI , Edward BRAZIL
Abstract: In some examples, multiple requesters request use of a resource and a single request is granted. A priority scheme can be set such that among pairs of requests, the lower numbered request is advanced. After one or more rounds of arbitration, a determination is made as to which request to grant. In a case where higher priority requesters are to be identified, masks can be used to mask out requests from non-higher priority requesters in a subsequent round. A mask can be generated for any requester that is at or below the priority level of the requester that had its request granted. Accordingly, when a high priority arbiter is used to set another priority level, the mask(s) can be used to indicate the higher priority requests.
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2.
公开(公告)号:US20240219462A1
公开(公告)日:2024-07-04
申请号:US18091060
申请日:2022-12-29
Applicant: Intel Corporation
Inventor: Rakesh KANDULA , Edward BRAZIL , Amir ZALTZMAN , Alon PERETZ , Alexander SEREBRYANIK , Chai ZIV , Nir BARUCH , Gilad SHAYEVITZ
IPC: G01R31/317
CPC classification number: G01R31/31705
Abstract: Examples include techniques for debug, survivability, and infield testing of a system-on-a-chip (SoC) or system-on-a-package (SoP) that can be configured as a processor. The techniques include using an agent coupled with a network-on-chip (NoC) fabric to launch transaction over the NoC fabric to test or debug agents, devices, or devices coupled to the SoC or SoP and/or interconnected to the NoC fabric.
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