公开(公告)号：US20210057348A1

公开(公告)日：2021-02-25

申请号：US16650292

申请日：2017-12-19

Applicant: Intel Corporation

Inventor： Ehren HWANG ,  Christopher M. PELTO ,  Seshu V. SATTIRAJU ,  Shravan GOWRISHANKAR ,  Zachary A. ZELL ,  Digvijay A. RAORANE

IPC: H01L23/532 ,  H01L21/768 ,  H01L23/498 ,  H01L23/522 ,  H01L23/528

Abstract: Disclosed are barrier materials between bumps and pads, and related devices and methods. A semiconductor device includes an interconnect, a top material, a pad on the interconnect and at least a portion of the top material, a bump on the pad, and a barrier material between the pad and the bump. The top material defines a via therethrough to the interconnect. The pad includes electrically conductive material. The bump includes electrically conductive material. The bump is configured to electrically connect the interconnect to another device. The barrier material is between the pad and the bump. The barrier material includes a conductive material that is resistant to electromigration, intermetallic compound reaction, or both electromigration and intermetallic compound reaction.