公开(公告)号：US20200226453A1

公开(公告)日：2020-07-16

申请号：US16832601

申请日：2020-03-27

Applicant: Intel Corporation

Inventor： Eric Luk ,  Mohamed Elmalaki ,  Sara Almalih ,  Cormac Brick

IPC: G06N3/063 ,  G06N3/04 ,  G06N3/08

Abstract: Examples to determine a dynamic batch size of a layer are disclosed herein. An example apparatus to determine a dynamic batch size of a layer includes a layer operations controller to determine a layer ratio between a number of operations of a layer and weights of the layer, a comparator to compare the layer ratio to a number of operations per unit of memory size performed by a computation engine, and a batch size determination controller to, when the layer ratio is less than the number of operations per unit of memory size, determine the dynamic batch size of the layer.

公开(公告)号：US12124941B2

公开(公告)日：2024-10-22

申请号：US16832601

申请日：2020-03-27

Applicant: Intel Corporation

Inventor： Eric Luk ,  Mohamed Elmalaki ,  Sara Almalih ,  Cormac Brick

IPC: G06N3/063 ,  G06N3/04 ,  G06N3/08

CPC classification number: G06N3/063 ,  G06N3/04 ,  G06N3/08

Abstract: Examples to determine a dynamic batch size of a layer are disclosed herein. An example apparatus to determine a dynamic batch size of a layer includes a layer operations controller to determine a layer ratio between a number of operations of a layer and weights of the layer, a comparator to compare the layer ratio to a number of operations per unit of memory size performed by a computation engine, and a batch size determination controller to, when the layer ratio is less than the number of operations per unit of memory size, determine the dynamic batch size of the layer.

公开(公告)号：US20230004430A1

公开(公告)日：2023-01-05

申请号：US17856968

申请日：2022-07-02

Applicant: Intel Corporation

Inventor： Richard Richmond ,  Eric Luk ,  Lingdan Zeng ,  Lance Hacking ,  Alessandro Palla ,  Mohamed Elmalaki ,  Sara Almalih

IPC: G06F9/48 ,  G06N3/10

Abstract: Technology for estimating neural network (NN) power profiles includes obtaining a plurality of workloads for a compiled NN model, the plurality of workloads determined for a hardware execution device, determining a hardware efficiency factor for the compiled NN model, and generating, based on the hardware efficiency factor, a power profile for the compiled NN model on one or more of a per-layer basis or a per-workload basis. The hardware efficiency factor can be determined on based on a hardware efficiency measurement and a hardware utilization measurement, and can be determined on a per-workload basis. A configuration file can be provided for generating the power profile, and an output visualization of the power profile can be generated. Further, feedback information can be generated to perform one or more of selecting a hardware device, optimizing a breakdown of workloads, optimizing a scheduling of tasks, or confirming a hardware device design.