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公开(公告)号：US20220391710A1
公开(公告)日：2022-12-08
申请号：US17820593
申请日：2022-08-18
申请人： Intel Corporation
发明人： Alessandro Palla , Ian Frederick Hunter , Richard Richmond , Cormac Brick , Sebastian Eusebiu Nagy
摘要： Systems, apparatuses and methods may provide for technology that determines a complexity of a task associated with a neural network workload and generates a hardware efficiency estimate for the task, wherein the hardware efficiency estimate is generated via a neural network based cost model if the complexity exceeds a threshold, and wherein the hardware efficiency estimate is generated via a cost function if the complexity does not exceed the threshold. In one example, the technology trains the neural network based cost model based on one or more of hardware profile data or register-transfer level (RTL) data.
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公开(公告)号：US20230004430A1
公开(公告)日：2023-01-05
申请号：US17856968
申请日：2022-07-02
申请人： Intel Corporation
发明人： Richard Richmond , Eric Luk , Lingdan Zeng , Lance Hacking , Alessandro Palla , Mohamed Elmalaki , Sara Almalih
摘要： Technology for estimating neural network (NN) power profiles includes obtaining a plurality of workloads for a compiled NN model, the plurality of workloads determined for a hardware execution device, determining a hardware efficiency factor for the compiled NN model, and generating, based on the hardware efficiency factor, a power profile for the compiled NN model on one or more of a per-layer basis or a per-workload basis. The hardware efficiency factor can be determined on based on a hardware efficiency measurement and a hardware utilization measurement, and can be determined on a per-workload basis. A configuration file can be provided for generating the power profile, and an output visualization of the power profile can be generated. Further, feedback information can be generated to perform one or more of selecting a hardware device, optimizing a breakdown of workloads, optimizing a scheduling of tasks, or confirming a hardware device design.
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