公开(公告)号：US20240213324A1

公开(公告)日：2024-06-27

申请号：US18087318

申请日：2022-12-22

Applicant: Intel Corporation

Inventor： Tuhin Guha Neogi ,  Hwichan Jun ,  Francis Goodwin

IPC: H01L29/10 ,  H01L25/065 ,  H01L29/06

CPC classification number: H01L29/1041 ,  H01L25/0655 ,  H01L29/0669 ,  H01L29/1095

Abstract: Techniques are provided herein to form semiconductor devices that include an elongated contact having two different heights on a source or drain region. A semiconductor device includes a gate structure around or otherwise on a semiconductor region (or channel region) that extends from a source or drain region. An elongated conductive contact is formed over the source or drain region that stretches or otherwise extends laterally across the source/drain trench above an adjacent source or drain region without contacting the adjacent source or drain region. A conductive via may contact the portion of the conductive contact over the adjacent source or drain region. Accordingly, the conductive contact may have a first thickness above the source or drain region and a second thickness above the adjacent source or drain region with the first thickness being greater than the second thickness.