公开(公告)号：US20190220074A1

公开(公告)日：2019-07-18

申请号：US16359810

申请日：2019-03-20

Applicant: Intel Corporation

Inventor： Ramnarayanan MUTHUKARUPPAN ,  Pradipta PATRA ,  Gaurav GOEL ,  Uday Bhaskar KADALI

IPC: G06F1/26 ,  G05F1/59

CPC classification number: G06F1/26 ,  G05F1/59

Abstract: Described is a voltage regulator with adaptive gain, which comprises: a plurality of power-gate transistors controllable by a digital bus, the plurality of power-gate transistors operable to provide a first power supply to a load, and to receive a second power supply as input; an analog-to-digital converter (ADC) to receive the first power supply and to generate a digital output representative of the first power supply; and a controller to receive the digital output representative of the first power supply and to generate the digital bus for controlling the plurality of power-gate transistors such that a transfer function of the plurality of power-gate transistors is substantially linear over an operating range.

公开(公告)号：US20160246342A1

公开(公告)日：2016-08-25

申请号：US15025871

申请日：2013-12-18

Applicant: INTEL CORPORATION

Inventor： Ramnarayanan MUTHUKARUPPAN ,  Pradipta PATRA ,  Gaurav GOEL ,  Uday Bhaskar KADALI

IPC: G06F1/26 ,  G05F1/59

CPC classification number: G06F1/26 ,  G05F1/59

Abstract: Described is a voltage regulator with adaptive gain, which comprises: a plurality of power-gate transistors controllable by a digital bus, the plurality of power-gate transistors operable to provide a first power supply to a load, and to receive a second power supply as input; an analog-to-digital converter (ADC) to receive the first power supply and to generate a digital output representative of the first power supply; and a controller to receive the digital output representative of the first power supply and to generate the digital bus for controlling the plurality of power-gate transistors such that a transfer function of the plurality of power-gate transistors is substantially linear over an operating range.

Abstract translation: 描述了具有自适应增益的电压调节器，其包括：可由数字总线控制的多个功率门晶体管，所述多个功率栅极晶体管可操作以向负载提供第一电源，以及接收第二电源 作为输入; 模数转换器（ADC），用于接收第一电源并产生代表第一电源的数字输出; 以及控制器，用于接收代表第一电源的数字输出并产生用于控制多个功率门晶体管的数字总线，使得多个功率栅极晶体管的传递函数在工作范围内基本上是线性的。

公开(公告)号：US20180364780A1

公开(公告)日：2018-12-20

申请号：US16062093

申请日：2016-11-23

Applicant: INTEL CORPORATION

Inventor： Ramnarayanan MUTHUKARUPPAN ,  Anoop Kumar UPADHYAY ,  Gaurav GOEL ,  Amit Kumar SRIVASTAVA

IPC: G06F1/28 ,  G06F9/445 ,  G06F13/20 ,  G06F13/40

Abstract: A configuration interface bus may be coupled to components of a physical layer (PHY) device. A configuration controller may be coupled with the configuration interface bus and may receive an input signal representing a power state of the PHY device. The configuration controller may further identify a set of instructions that correspond to the input signal and may transmit configuration data via the configuration interface bus to one or more of the components of the PHY device in response to an execution of the set of instructions. The operation of the one or more components of the PHY device may be based on the configuration data.