公开(公告)号：US20220415780A1

公开(公告)日：2022-12-29

申请号：US17356056

申请日：2021-06-23

Applicant: Intel Corporation

Inventor： William HSU ,  Biswajeet GUHA ,  Mohit K. HARAN ,  Vadym KAPINUS ,  Robert BIGWOOD ,  Nidhi KHANDELWAL ,  Henning HAFFNER ,  Kevin FISCHER

IPC: H01L23/528 ,  H01L27/088 ,  H01L21/033 ,  H01L21/8234

Abstract: Dummy gate patterning lines, and integrated circuit structures resulting therefrom, are described. For example, an integrated circuit structure includes a first gate line along a first direction. A second gate line is parallel with the first gate line along the first direction. A third gate line extends between and is continuous with the first gate line and the second gate line along a second direction, the second direction orthogonal to the first direction.