公开(公告)号：US20180181404A1

公开(公告)日：2018-06-28

申请号：US15391915

申请日：2016-12-28

Applicant: Intel Corporation

Inventor： Hideki Saito Ido ,  Eric N. Garcia ,  Xinmin Tian ,  Milind B. Girkar ,  James Brodman

IPC: G06F9/38 ,  G06F9/30

CPC classification number: G06F9/3844 ,  G06F9/30058 ,  G06F9/3806 ,  G06F15/76

Abstract: In one example, a system for generating vector based selection control statements can include a processor to determine a vector cost of the selection control statement is below a scalar cost and determine the selection control statement is to be executed in a sorted order based on dependencies between branch instructions of the selection control statement. The processor can also determine a program ordering of labels of the selection control statement does not match a mathematical ordering of the labels and execute the selection control statement with a vector of values, wherein the selection control statement is to be executed based on a jump table and a sorted unique value technique, wherein the sorted unique value technique comprises selecting at least one of the plurality of branch instructions from the jump table.

公开(公告)号：US20220197715A1

公开(公告)日：2022-06-23

申请号：US17693010

申请日：2022-03-11

Applicant: Intel Corporation

Inventor： Ben J. Ashbaugh ,  Michael Kinsner ,  James Brodman ,  Rajesh Poornachandran

IPC: G06F9/50

Abstract: An apparatus to facilitate data parallel programming-based transparent transfer across heterogeneous devices is disclosed. The apparatus includes a processor to: identify a change in device status that triggers a device transfer process from an original device, wherein the original device is associated with a queue of an application program of a data parallel programming runtime; identify a new device that is compatible with the original device; migrate at least one of a state or data of the original device to the new device; logically map, without user intervention, the queue to the new device in the data parallel programming runtime; and initiate execution of the application program on the new device using the queue.

公开(公告)号：US20220197615A1

公开(公告)日：2022-06-23

申请号：US17692425

申请日：2022-03-11

Applicant: Intel Corporation

Inventor： Michael Kinsner ,  Ben J. Ashbaugh ,  James Brodman ,  Rajesh Poornachandran

IPC: G06F8/41 ,  G06F9/48

Abstract: An apparatus to facilitate data parallel programming task graph optimization through device telemetry is disclosed. The apparatus includes a processor to: receive, from a compiler, compiled code generated from source code of an application, the compiled code to support a workload of the application; generate a task graph of the application using the compiled code, the task graph to represent at least one of a relationship or dependency of the compiled code; receive runtime telemetry data corresponding to execution of the compiled code on the one or more accelerator devices; identify one or more scheduling optimizations for the one or more accelerator devices based on the task graph and the received telemetry data; and provide a scheduling command to cause the one or more scheduling optimizations to be implemented in the one or more accelerator devices.

公开(公告)号：US10795682B2

公开(公告)日：2020-10-06

申请号：US15391915

申请日：2016-12-28

Applicant: Intel Corporation

Inventor： Hideki Saito Ido ,  Eric N Garcia ,  Xinmin Tian ,  Milind B. Girkar ,  James Brodman

IPC: G06F9/38 ,  G06F9/30 ,  G06F15/76

Abstract: In one example, a system for generating vector based selection control statements can include a processor to determine a vector cost of the selection control statement is below a scalar cost and determine the selection control statement is to be executed in a sorted order based on dependencies between branch instructions of the selection control statement. The processor can also determine a program ordering of labels of the selection control statement does not match a mathematical ordering of the labels and execute the selection control statement with a vector of values, wherein the selection control statement is to be executed based on a jump table and a sorted unique value technique, wherein the sorted unique value technique comprises selecting at least one of the plurality of branch instructions from the jump table.