公开(公告)号：US20240111444A1

公开(公告)日：2024-04-04

申请号：US17958108

申请日：2022-09-30

申请人： Intel Corporation

发明人： Javier MARTIN LANGERWERF ,  Jeroen LEIJTEN ,  Gerard EGELMEERS ,  Venkata Sudhir KONJETI

IPC分类号： G06F3/06 ,  G06F1/10

CPC分类号： G06F3/064 ,  G06F1/10 ,  G06F3/0604 ,  G06F3/0625 ,  G06F3/0673

摘要： Examples include techniques to reduce power consumption for a distributed computational model mapped onto a multi-processing node system. Examples are described of processing nodes relaying indicator information to enable clock gate circuitry to determine whether or not to gate a clock to stall consuming compute circuitry based on availability of data to consume. Examples are also described of processing nodes relaying indicator information to enable clock gate circuitry to determine whether or not to gate a clock to stall producing compute circuitry based on available buffer capacity at a consuming compute circuitry.