公开(公告)号：US20230034779A1

公开(公告)日：2023-02-02

申请号：US17963662

申请日：2022-10-11

Applicant: Intel Corporation

Inventor： Cunming LIANG ,  Jiayu HU ,  Jingjing WU ,  Qi FU ,  Zhirun YAN ,  Hongjun NI ,  Xiuchun LU ,  Fan ZHANG ,  Haiyue WANG ,  Pan ZHANG

IPC: G06F9/48 ,  G06F9/54

Abstract: Examples described herein relate to during runtime of at least one process, cause the one or more processors to execute the at least one process according to the determined thread model and in-process with a sidecar, wherein the sidecar is to communicate with a service mesh to communicate with one or more microservices of a cloud native application.

公开(公告)号：US20220179805A1

公开(公告)日：2022-06-09

申请号：US17441668

申请日：2019-06-21

Applicant: Intel Corporation

Inventor： Jiayu HU ,  Ren WANG ,  Cunming LIANG

IPC: G06F13/16 ,  G06F13/28 ,  G06F9/30

Abstract: Examples include a computing system having a direct memory access (DMA) engine pipeline, a plurality of processing cores, each processing core including a core pipeline, and a memory coupled to the DMA engine pipeline and the plurality of processing cores. The computing system includes a pipeline selector coupled to the plurality of processing cores and the DMA engine pipeline, the pipeline selector to, during initialization, determine at least one threshold for pipeline selection for the computing system, and during runtime, select one of the core pipelines or the DMA engine pipeline to execute a memory copy operation in the memory based at least in part on the at least one threshold.