公开(公告)号：US20210104476A1

公开(公告)日：2021-04-08

申请号：US16596383

申请日：2019-10-08

Applicant: Intel Corporation

Inventor： Zhiguo QIAN ,  Cemil GEYIK ,  Jiwei SUN ,  Gang DUAN ,  Kemal AYGÜN

IPC: H01L23/64 ,  H01L23/498

Abstract: Embodiments include package substrates and a semiconductor package with such package substrates. A package substrate includes a first conductive layer in a first magnetic layer, and a second magnetic layer over the first magnetic layer, where the first and second magnetic layers include magnetic materials. The package substrate also includes a second conductive layer in the second magnetic layer. The second conductive layer includes a plurality of first traces fully surrounded by the first and second magnetic layers. The package substrate includes a third conductive layer over the second magnetic layer. The magnetic materials may include manganese Mn ferrite materials, Zn/Mn ferrite materials, or Ni/Zn ferrite materials. The magnetic materials include material properties with a low constant value, a magnetic tangent value, a frequency, a base filler chemistry, a filler shape, a filler orientation, a filler percentage, a loading fraction value, a permeability, an insertion loss, and a resin formulation.

公开(公告)号：US20230317588A1

公开(公告)日：2023-10-05

申请号：US17707342

申请日：2022-03-29

Applicant: Intel Corporation

Inventor： Jiwei SUN ,  Zhiguo QIAN ,  Kemal AYGÜN

IPC: H01L23/498 ,  H01L23/66

CPC classification number: H01L23/49827 ,  H01L2223/6616 ,  H01L23/66 ,  H01L23/49838

Abstract: Embodiments disclosed herein include electronic packages In an embodiment, the electronic package comprises first substrate layers, and a core under the first substrate layers. In an embodiment, second substrate layers are under the core, and an interconnect is through the first substrate layers, the core, and the second substrate layers. In an embodiment, a portion of the interconnect through the second substrate layers comprises a pad, and a plurality of vias extending away from the pad.