公开(公告)号：US20180365346A1

公开(公告)日：2018-12-20

申请号：US15622248

申请日：2017-06-14

Applicant: Intel Corporation

Inventor： John Stuart Freeman ,  Byron Sinclair ,  Dirk Seynhaeve

IPC: G06F17/50

Abstract: A method for designing a system on a target device includes performing high-level compilation on a high-level language source file to generate a hardware description language (HDL) of the system and a serial testbench for the system. Verification is performed on the system that examines a parallel nature of the system by using the serial testbench.

公开(公告)号：US10997339B2

公开(公告)日：2021-05-04

申请号：US15622248

申请日：2017-06-14

Applicant: Intel Corporation

Inventor： John Stuart Freeman ,  Byron Sinclair ,  Dirk Seynhaeve

IPC: G06F30/3323 ,  G06F30/33

Abstract: A method for designing a system on a target device includes performing high-level compilation on a high-level language source file to generate a hardware description language (HDL) of the system and a serial testbench for the system. Verification is performed on the system that examines a parallel nature of the system by using the serial testbench.