公开(公告)号：US11199586B2

公开(公告)日：2021-12-14

申请号：US15837462

申请日：2017-12-11

申请人： Intel Corporation

发明人： Enrico D. Carrieri ,  John W. Kitterman ,  Keith A. Jones

IPC分类号： G01R31/3185 ,  G01R31/317

摘要： A Joint Test Access Group (JTAG) device can include a Joint Test Access Group (JTAG) port, transport layer circuitry to provide a communication to and from a debug device, and packet interpreter circuitry communicatively coupled between the JTAG port and the transport layer circuitry, the packet interpreter circuitry to translate data in a packet from the debug device into a sequence of bits to be provided to the JTAG port.

公开(公告)号：US20190033375A1

公开(公告)日：2019-01-31

申请号：US15837462

申请日：2017-12-11

申请人： Intel Corporation

发明人： Enrico D. Carrieri ,  John W. Kitterman ,  Keith A. Jones

IPC分类号： G01R31/3185 ,  G01R31/317

摘要： A Joint Test Access Group (JTAG) device can include a Joint Test Access Group (JTAG) port, transport layer circuitry to provide a communication to and from a debug device, and packet interpreter circuitry communicatively coupled between the JTAG port and the transport layer circuitry, the packet interpreter circuitry to translate data in a packet from the debug device into a sequence of bits to be provided to the JTAG port.