公开(公告)号：US20230315642A1

公开(公告)日：2023-10-05

申请号：US18207602

申请日：2023-06-08

Applicant: Intel Corporation

Inventor： Leon POLISHUK ,  Ayan MANDAL ,  Neetu JINDAL ,  Eran SHIFER ,  Keren MELAMED

IPC: G06F12/0877

CPC classification number: G06F12/0877 ,  G06F2212/60

Abstract: Examples described herein relate to a cache fabric that includes a first layer of a group of routers and includes a second layer of a plurality of clusters of cache controllers. A router of the group of routers can be accessible via an interface that is to receive a memory access request from a processor and select from a group of cache controllers based on a cluster identifier and memory address and provide the memory access request to the selected group of cache controllers. The selected group of cache controllers can receive the memory access request and service a memory access request from a cache device or forward the memory access request to a second cache controller associated with the cache device or a second cache device.