公开(公告)号：US20240297586A1

公开(公告)日：2024-09-05

申请号：US18177426

申请日：2023-03-02

Applicant: Intel Corporation

Inventor： Keng Chen ,  Shunjiang Xu ,  Christopher Schaef ,  Tamir Salus ,  Kishan Joshi ,  Arvind Raghavan ,  Huanhuan Zhang

IPC: H02M3/158 ,  G06F1/26

CPC classification number: H02M3/1584 ,  G06F1/26

Abstract: Embodiments described herein may include apparatus, systems, techniques, and/or processes that are directed to multiphase power converters and how current level outputs of each phase circuit are calibrated. The multiple phase circuits are grouped into multiple subsets, wherein one phase circuit of each subset is designated as a reference phase circuit. The reference phase circuits of each subset are calibrated together, using, for example, a closed loop daisy chain technique where each reference phase circuit calibrates their current output to the current output of the previous phase circuit, or alternatively, a current averaging technique where each reference phase circuit balances their current output to the average output of the reference phase circuits. The other phase circuits in each subset calibrate their current level outputs to the reference phase circuits in their subset using, for example, an open loop daisy chain technique, a reference/follower technique or by calibrating their output to the average output of the reference phase circuits.