公开(公告)号：US20230371408A1

公开(公告)日：2023-11-16

申请号：US17744374

申请日：2022-05-13

Applicant: Intel Corporation

Inventor： Lu LIU ,  Hemant P. RAO ,  Kumar R. VIRWANI

IPC: H01L45/00 ,  H01L27/24

CPC classification number: H01L45/1253 ,  H01L27/2481 ,  H01L27/2427 ,  H01L45/06 ,  H01L45/16

Abstract: Memory devices having optimized phase change memory (PCM) structures to improve nucleation time variation and methods for forming the phase change memory structures. The PCM structures are composed of layers including a first electrode layer, a PCM layer having a first interface with the first electrode layer comprising a first electrode/PCM interface, and a second electrode layer, having a second interface with the phase change material layer comprising a PCM/second electrode interface. The first electrode/PCM interface and the PCM/second electrode interface are non-flat and configured to reduce statistical variation of nucleation time. Techniques/processes for forming these interfaces include creating serrated or rough edges, forming patterned shapes, and attaching nanodots. The average contact angle of heterogenous nucleation is significantly reduced from the flat surface used in conventional PCM structures, enabling the new PCM structure to exhibit a more controlled nucleation time with less statistical variation.