公开(公告)号：US11176658B2

公开(公告)日：2021-11-16

申请号：US16572446

申请日：2019-09-16

Applicant: Intel Corporation

Inventor： Bikram Baidya ,  Allan Gu ,  Vivek K. Singh ,  Kumara Sastry ,  Abde Ali Hunaid Kagalwalla

IPC: G06T7/00 ,  G06K9/62

Abstract: A method comprising determining a binary classification value for each of a plurality of data instances based on a first threshold value assigned to each of the plurality of data instances; applying at least one clustering model to a first subset of the plurality of data instances to identify one or more dominant clusters of data instances; determining a second threshold value to assign to a second plurality of data instances that are included within the one or more dominant clusters of data instances; and redetermining a binary classification value for each of the plurality of data instances based on the second threshold value assigned to the second plurality of data instances and the first threshold value, wherein the first threshold value is assigned to at least a portion of data instances of the plurality of data instances that are not included in the second plurality of data instances.

公开(公告)号：US11663700B2

公开(公告)日：2023-05-30

申请号：US16457926

申请日：2019-06-29

Applicant: Intel Corporation

Inventor： John A. Swanson ,  Vivek K. Singh ,  Kumara Sastry ,  Helen F. Parks ,  I-Tzu Chen

IPC: G06N3/126 ,  G06N20/00 ,  G06N7/01 ,  G06T5/00 ,  G06F17/18 ,  G06F18/24 ,  G06V10/762 ,  G06V10/764 ,  G06V10/40

CPC classification number: G06T5/002 ,  G06F17/18 ,  G06F18/24 ,  G06N3/126 ,  G06N7/01 ,  G06N20/00 ,  G06V10/40 ,  G06V10/762 ,  G06V10/764

Abstract: A method comprising identifying a set of target features for a plurality of data instances of an input data collection; determining feature values for the set of target features for the plurality of data instances; identifying a plurality of outlier data instances based on the determined feature values; identifying a plurality of noisy data instances from the outlier data instances based on feature values of the plurality of noisy data instances, wherein a noisy data instance is identified based on a determination that noise is present in noisy data instance; and providing an indication of the plurality of noisy data instances.

公开(公告)号：US11282189B2

公开(公告)日：2022-03-22

申请号：US16572594

申请日：2019-09-16

Applicant: Intel Corporation

Inventor： John A. Swanson ,  Kenny K. Toh ,  Kumara Sastry ,  Lillian Chang ,  Manuj Swaroop ,  Vivek K. Singh

IPC: G06T7/00

Abstract: Images are accessed representing a status in a fabrication of a semiconductor chip corresponding to a particular stage in the fabrication. Distortion is removed from the images and actual features of the semiconductor chip are extracted from the images. Synthesized ideal features of the semiconductor chip associated with completion of the particular stage in the fabrication are determined from the one or more images. The actual features are compared to the ideal features to determine whether anomalies associated with the particular stage exist in the semiconductor chip.

公开(公告)号：US20200013157A1

公开(公告)日：2020-01-09

申请号：US16572594

申请日：2019-09-16

Applicant: Intel Corporation

Inventor： John A. Swanson ,  Kenny K. Toh ,  Kumara Sastry ,  Lillian Chang ,  Manuj Swaroop ,  Vivek K. Singh

IPC: G06T7/00

Abstract: Images are accessed representing a status in a fabrication of a semiconductor chip corresponding to a particular stage in the fabrication. Distortion is removed from the images and actual features of the semiconductor chip are extracted from the images. Synthesized ideal features of the semiconductor chip associated with completion of the particular stage in the fabrication are determined from the one or more images. The actual features are compared to the ideal features to determine whether anomalies associated with the particular stage exist in the semiconductor chip

公开(公告)号：US10915691B2

公开(公告)日：2021-02-09

申请号：US16457209

申请日：2019-06-28

Applicant: Intel Corporation

Inventor： Bikram Baidya ,  Vivek K. Singh ,  Allan Gu ,  Abde Ali Hunaid Kagalwalla ,  Saumyadip Mukhopadhyay ,  Kumara Sastry ,  Daniel L. Stahlke ,  Kritika Upreti

IPC: G06F30/30 ,  G06F30/398 ,  G06F16/2458 ,  G06F16/248 ,  G03F1/36 ,  G06F16/2457

Abstract: A semantic pattern extraction system can distill tremendous amounts of silicon wafer manufacturing data to generate a small set of simple sentences (semantic patterns) describing physical design geometries that may explain manufacturing defects. The system can analyze many SEM images for manufacturing defects in areas of interest on a wafer. A tagged continuous itemset is generated from the images, with items comprising physical design feature values corresponding to the areas of interest and tagged with the presence or absence of a manufacturing defect. Entropy-based discretization converts the continuous itemset into a discretized one. Frequent set mining identifies a set of candidate semantic patterns from the discretized itemset. Candidate semantic patterns are reduced using reduction techniques and are scored. A ranked list of final semantic patterns is presented to a user. The final semantic patterns can be used to improve a manufacturing process.

公开(公告)号：US10885259B2

公开(公告)日：2021-01-05

申请号：US16557945

申请日：2019-08-30

Applicant: Intel Corporation

Inventor： Bikram Baidya ,  John A. Swanson ,  Kumara Sastry ,  Prasad N. Atkar ,  Vivek K. Singh

IPC: G06F30/00 ,  G06F30/398 ,  G06F17/18 ,  G06N5/02 ,  G06K9/62 ,  G06F30/392 ,  G06N20/00

Abstract: An improved random forest model is provided, which has been trained based on silicon data generated from tests of previously fabricated chips. An input is provided to the random forest model, the input including a feature set of a pattern within a particular chip layout, the feature set identifying geometric attributes of polygonal elements within the pattern. A result is generated by the random forest model based on the input, where the result identifies a predicted attribute of the pattern based on the silicon data, and the result is generated based at least in part on determining, within the random forest model, that geometric attributes of the pattern were included in the previously fabricated chips, where the previously fabricated chips have chip layouts are different from the particular chip layout.