公开(公告)号：US20180091148A1

公开(公告)日：2018-03-29

申请号：US15279273

申请日：2016-09-28

Applicant: Intel Corporation

Inventor： Siti Suhaila MOHD YUSOF ,  Amit Kumar SRIVASTAVA ,  Lay Hock KHOO ,  Chin Boon TEAR

IPC: H03K19/00 ,  H03K19/003 ,  G06F1/28 ,  G06F1/06

CPC classification number: H03K19/0005 ,  G06F1/06 ,  G06F1/28 ,  H03K19/00369

Abstract: An apparatus is provided which comprises: a data sampler coupled to an output of a driver, wherein the data sampler is to sample data and to compare it with a first threshold voltage and a second threshold voltage, and wherein the data sampler is to generate an up or down indicator according to comparing the data with the first and second threshold voltages; and logic coupled to the data sampler, wherein the logic is to receive the up or down indicator and to increment or decrement a number of already DC compensated impedance legs of the driver according to the up or down indicator.