公开(公告)号：US20230185624A1

公开(公告)日：2023-06-15

申请号：US17952120

申请日：2022-09-23

Applicant: Intel Corporation

Inventor： Le Yao ,  Ruijing Guo ,  Malini K. Bhandaru ,  Qiaowei Ren ,  Haibin Huang ,  Ruoyu Ying

IPC: G06F9/50 ,  G06F9/54

CPC classification number: G06F9/505 ,  G06F9/54

Abstract: A processing circuitry, a method to be performed at the processing circuitry, a computer-readable storage medium, and a computing system. The processing circuitry is to determine a first mapping between a first set of data parameters and first computing units of a computing network; select, based on the first mapping and on first data having a first workload associated therewith, one or more of the first computing units to execute the first workload, and send for execution the first workload to the one or more of the first computing units; determine a second mapping based on a change in computing units from the first computing units to second computing units, the second mapping between a second set of data parameters and the second computing units; and select, based on the second mapping and on second data having a second workload associated therewith, one or more of the second computing units to execute the second workload.