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公开(公告)号:US20230188341A1
公开(公告)日:2023-06-15
申请号:US18106259
申请日:2023-02-06
Applicant: Intel Corporation
Inventor: Ruoyu Ying , Ruijing Guo , Shaojun Ding , Qiang Ren , Haibin Huang , Jie Ren
CPC classification number: H04L9/0897 , G06F21/53
Abstract: An apparatus can include an interface coupled to processing circuitry and cryptographic circuitry coupled to the interface. The cryptographic circuitry can receive a request from the processing circuitry over the interface to perform a cryptographic operation using a remote hardware security module (HSM) key component. The cryptographic circuitry can further transmit a command to a remote component to retrieve the remote HSM key component. Subsequent to receiving the cryptographic key component, the cryptographic circuitry can construct a trusted execution environment (TEE) instance and store the remote HSM key component in the TEE instance. The cryptographic circuitry can use the remote HSM key component to perform the cryptographic operation and provide a result of the cryptographic operation to the processing circuitry over the interface.
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公开(公告)号:US20240022405A1
公开(公告)日:2024-01-18
申请号:US18477370
申请日:2023-09-28
Applicant: Intel Corporation
Inventor: Kapil Sood , Shaojun Ding , Dong Guo , Huailong Zhang , Ruijing Guo , Hejie Xu , Qiming Liu
CPC classification number: H04L9/3073 , H04L9/0894 , H04L63/0281
Abstract: Systems, apparatus, articles of manufacture, and methods are disclosed to provide hardware enforced security for a service mesh. An example first server of a service mesh disclosed herein to provide hardware enforced security for a service mesh includes programmable circuitry to at least one of instantiate or execute the machine-readable instructions to detect a second server of the service mesh, cause a public key of the second server to be stored in the first enclave, and after an attestation for a second enclave is obtained, cause addition of the second server to the service mesh.
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公开(公告)号:US20230185624A1
公开(公告)日:2023-06-15
申请号:US17952120
申请日:2022-09-23
Applicant: Intel Corporation
Inventor: Le Yao , Ruijing Guo , Malini K. Bhandaru , Qiaowei Ren , Haibin Huang , Ruoyu Ying
Abstract: A processing circuitry, a method to be performed at the processing circuitry, a computer-readable storage medium, and a computing system. The processing circuitry is to determine a first mapping between a first set of data parameters and first computing units of a computing network; select, based on the first mapping and on first data having a first workload associated therewith, one or more of the first computing units to execute the first workload, and send for execution the first workload to the one or more of the first computing units; determine a second mapping based on a change in computing units from the first computing units to second computing units, the second mapping between a second set of data parameters and the second computing units; and select, based on the second mapping and on second data having a second workload associated therewith, one or more of the second computing units to execute the second workload.
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