公开(公告)号：US20210193248A1

公开(公告)日：2021-06-24

申请号：US17132902

申请日：2020-12-23

Applicant: Intel Corporation

Inventor： Lunkai ZHANG ,  Rakan MADDAH ,  Prashant S. DAMLE

IPC: G11C29/42 ,  G11C29/44 ,  G11C29/12 ,  G11C29/18 ,  G11C29/00

Abstract: A “near miss” based refresh scheme performs refreshes to read disturbed codewords proactively (or on-demand). In one example, a controller receives a read request to a target address (e.g., from a host memory controller). The read request is sent to memory, and the memory returns the read data. ECC logic decodes the read data and determines the number of error bits in the read data. If the number of error bits is greater than a threshold, a refresh write command is sent to the command queue. If an outstanding write command to the same address is already in the queue, the refresh write can be dropped and the outstanding write command converted into a refresh write command. A data cache can service read commands to the target address until the near miss-based refresh command completes.