公开(公告)号：US09870301B2

公开(公告)日：2018-01-16

申请号：US14231240

申请日：2014-03-31

Applicant: Intel Corporation

Inventor： Tsvika Kurts ,  Eilon Hazan ,  Sean T. Baartmans ,  Marcus R. Winston ,  Rony Ghattas ,  Arie Bernstein ,  Todd M. Witter ,  Marcelo Yuffe

IPC: G06F11/00 ,  G06F11/34 ,  G06F11/30 ,  G06F11/32 ,  G06F11/36

CPC classification number: G06F11/3476 ,  G06F11/3024 ,  G06F11/323 ,  G06F11/3409 ,  G06F11/3466 ,  G06F11/3636 ,  G06F11/3656

Abstract: A processing device comprises a debug port controller to monitor operations of the processing device to determine whether the processing device is operating in a first mode or a second mode and to collect trace information comprising operating characteristics of the processing device. The processing device further comprises a display engine logic to process display data for output to a display device. In addition, the processing device comprises a display engine interface to provide, to a plurality of existing platform connectors, the display data from the display engine logic when the processing device is operating in the first primary mode and the trace information from the debug port controller when the processing device is operating in the second mode as determined by the debug port controller.