公开(公告)号：US20210043567A1

公开(公告)日：2021-02-11

申请号：US16534104

申请日：2019-08-07

Applicant: Intel Corporation

Inventor： Mark ANDERS ,  Himanshu KAUL ,  Ram KRISHNAMURTHY ,  Kevin Lai LIN ,  Mauro KOBRINSKY

IPC: H01L23/528 ,  G06F17/50 ,  G11C5/06

Abstract: Embodiments disclosed herein include a semiconductor device with interconnects with non-uniform heights. In an embodiment, the semiconductor device comprises a semiconductor substrate, and a back end of line (BEOL) stack over the semiconductor substrate. In an embodiment, the BEOL stack comprises first interconnects and second interconnects in an interconnect layer of the BEOL stack. In an embodiment, the first interconnects have a first height and the second interconnects have a second height that is different than the first height.

公开(公告)号：US20210043500A1

公开(公告)日：2021-02-11

申请号：US16534063

申请日：2019-08-07

Applicant: Intel Corporation

Inventor： Kevin Lai LIN ,  Mauro KOBRINSKY ,  Mark ANDERS ,  Himanshu KAUL ,  Ram KRISHNAMURTHY

IPC: H01L21/768 ,  H01L23/528

Abstract: Embodiments disclosed herein include interconnect layers that include non-uniform interconnect heights and methods of forming such devices. In an embodiment, an interconnect layer comprises an interlayer dielectric (ILD), a first interconnect disposed in the ILD, wherein the first interconnect has a first height, and a second interconnect disposed in the ILD, wherein the second interconnect has a second height that is different than the first height.